General
Application areas: | Contingency processing; see "Contingency processes" |
Macro type: | S-Typ, MF-Format 1: standard/L/E form; see "S-type macros" |
If a basic process or a contingency process is interrupted by a contingency process, the contents of its registers and of the program counter are stored in the PCB (process control block).
Macro description
The CONTXT macro gives a contingency process access to the context (PCB, Process Control Block) of an interrupted process.
CONTXT supports all current BS2000 servers. The interrupted process can therefore exist in /390 code with a /390 context (/390 servers) or in x86 code with an x86 context (x86 servers). Since there are differences between contexts, the LAYOUT operand is used to distinguish them.
If LAYOUT=COMPATIBLE (default), the complete context (register and PC) are read for an interrupted /390 process. The whole context can be modified and written.
For an interrupted x86 process, the equivalent parts of the context are mapped to the relevant areas of the layout. The context is therefore not output in its entirety. It can also only be written in parts.
If LAYOUT=FCONTXT, the complete context of an interrupted x86 process is read. ILC is formed. CC and PM are meaningless.
The complete context of an interrupted /390 process is mapped to the relevant areas of the layout.
The whole context of a process can be modified and written. CC, ILC and PM cannot be written for x86 processes.
See also “PCB accesses in the /390 process mode”.
If x86 code is integrated or dynamically loaded (e.g. dynamic loading of the ported product SORT) in user applications (/390-Code) both the context of x86 code and the context of /390 code are visible at this interface, depending on the mode in which the interruption occurred. Programs which run completely in /390 mode are not affected.
The following differences in the context can be seen when a x86 program is interrupted and the context of the interrupted (x86) process is viewed (CONTXT SAVE=...,LAYOUT=FCONTXT):
the context contains the /390-equivalent parts (register, PC, floating-point register, etc.) which can also be addressed via the DSECT and
an HSI-dependent area which can be read or written in block form
Macro format and description of operands
CONTXT |
[ {SAVE={addr / (r)} / STACKR=(x1, x2, ...),OWNR=(y1, y2,...) }] [, {SAVACR={addr / (r)} / STKACR=(x1, x2, ...),OWNACR=(y1, y2,...) }] ,FPR=NO / YES ,PROCESS=MAIN / LAST ,FUNCT=READ / WRITE ,LAYOUT=COMPATIBLE / FCONTXT ,LAYOUTF=DSECT[,PREFIX=p] [,ILC=addr / (r)] [,CC=addr / (r)] [,PM=addr / (r)] [,PMODE=addr / (r)] [,MODE=addr / (r)] [,ASCMOD=addr / (r)] [,PRGCODE=addr / (r)] [,PRGCODL=addr / (r)] [,PARMOD=24 / 31] [,MF=L / (E,..)] |
The operands ILC, CC, PM are meaningless for x86 servers.
SAVE=
Describes the address of a field used for exchanging data with the PCB of the specified process (PROCESS operand). The structure and contents of this field depend on the LAYOUT operand.
LAYOUT=COMPATIBLE (preset value)
The data exchange field has the same structure as in the previous CONTXT interface in /390 mode.
Field length = 68 bytes; data must be aligned on word boundaries.
Field structure and assignments:Byte 0 - byte 63: Register R0 through R15 of the /390 PCB equivalent registers of the X86 PCB Byte 64 b- byte 67: program counter (PC)LAYOUT=FCONTXT
To support x86 mode the data exchange field has a structure of its own. In addition to the /390 PCB it also contains the entire x86 PCB and consequently also the floatingpoint registers. They are passed between the data exchange field and the PCB of the specified process, regardless of the value of the FPR operand.If, however, the process whose PCB is being accessed is running in /390 mode, then a limited amount of data is passed. Only the areas of the data exchange field that represent SPARC registers for which there are /390 equivalents are read or supplied with data.
The field length of the data exchange field can be determined dynamically with the STXIT macro, CONTXTL operand. Validation of the data exchange field is, however, always implemented in the length used. The data exchange field must be aligned to doubleword boundary.
A DSECT that describes the new structure of the data exchange field can be created by calling the CONTXT macro with the operand LAYOUTF=DSECT. With this DSECT, it is possible to symbolically address the individual subfields of the data exchange field.
If FUNCT=READ applies, the context is transferred from the PCB of the specified process to the specified field.
If FUNCT=WRITE applies, the content of the specified field is transferred to the context of the specified process. The program counter (PC / NIA = Next Instruction Address) can only be written if it points to a /390 module or if LAYOUT= FCONTXT has been specified.
addr
Symbolic address (name) of the area for data exchange.
(r)
r = register containing the address value “addr”
STACKR=
Designates a series of selected registers (including the program counter) of the specified process for data exchange. For x86 contexts, only the general-purpose registers are supported as being equivalent to the /390 registers R0 through R15. the content of the specified field is transferred to the context of the specified process. The program counter (PC / NIA = Next Instruction Address) can only be written if it points to a /390 module or if LAYOUT= FCONTXT has been specified. There are no such restrictions when reading the program counter.
Note
The same number of operand values must be specified for the STACKR and OWNR operands. The specifications enclosed in parentheses are paired for data transfer. Thus data transfer is effected between x1 and y1, between x2 and y2, between x3 and y3, etc.
(x1,x2,...)
x1,x2 = members of the set (0,1,2,.....,15,PC).
The numbers 0, ....,15 stand for the general registers, and PC for the program counter. In the case of the program counter, only the address of the next instruction is transferred.
OWNR=
Identifies a sequence of selected registers of the calling (contingency) process, which are to be used to receive the values read, or to contain the values to be written (see also the note on STACKR).
(y1,y2,...)
y1,y2 = members of the set (0,1,2,.....,15,PC).
The numbers 0, ....,15 stand for the general registers and PC stands for the program counter.
When STACKR and OWNR are used, it is important to note that the macro destroys the contents of registers R1 and R15 (register R1: address of the macro operand list, register R15: return information). Thus, it is not possible to “write” the contents from register R1 and to “read” the contents into register R15.
SAVACR=
Identifies the address of a field for data exchange with the PCB of the specified process (PROCESS operand).
Field length = 64 bytes; the field must be aligned on a word boundary.
If FUNCT=READ, the contents of the access registers AR0 through AR15 are transferred from the PCB of the specified process into the specified field.
If FUNCT=WRITE, the contents of the specified field are transferred into the access register of the specified process according to the above assignment.
addr
Symbolic address (name) of the field for data exchange.
(r)
r = register containing the address value “addr”.
STKACR=
Identifies a sequence of selected access registers of the specified process for use in data exchange.
Note
The same number of operand values must be specified for the STKACR and OWNACR operands. The specifications enclosed in parentheses are paired for data transfer. Thus data transfer is effected between x1 and y1, between x2 and y2, between x3 and y3, etc.
(x1,x2,...)
x1,x2 = members of the set (0,1,2,.....,15).
The numbers 0, ....,15 stand for the access registers.
OWNACR=
Identifies a sequence of access registers of the calling (contingency) process, which are to be used to receive the values read, or to contain the values to be written; (see also the note on STKACR).
(y1,y2,...)
y1,y2 = members of the set (0,1,2,.....,15).
The numbers 0, ....,15 stand for the access registers.
FPR=
Specifies whether or not the contents of the floating-point registers are to be transferred.This operand is only significant when used with LAYOUT=COMPATIBLE (preset value). If one of the participating processes is running in x86 mode, then only floating-point registers of the process may participate in the transfer that represent the equivalent /390 floating-point registers.
NO
The contents of the floating-point registers are not to be transferred.
YES
If FUNCT=READ is specified, the contents of the floating-point registers of the specified process are transferred to the floating-point registers of the calling (contingency) process.
If FUNCT=WRITE is specified, the contents of the floating-point registers of the calling (contingency) process are transferred to the floating-point registers of the specified process.
If LAYOUT=FCONTXT is specified, there is no direct transfer of the contents of the floating-point registers of the calling process to the floating-point registers of the specified process or vice versa.
Instead, the floating-point registers are passed using the data exchange field that is specified by the SAVE operand. The FPR operand specification is ignored.
All the x86 mode floating-point registers are passed, regardless of the run mode of the calling process, if the specified process is running in x86 mode.
PROCESS=
Specifies the process which is to be accessed.
MAIN
The basic process is accessed, even if it was not the one directly interrupted by the calling (contingency) process.
LAST
The process that was interrupted by the calling process is accessed. This can be the basic process or another contingency process.
FUNCT=
Specifies whether a read or write access is required.
See also “PCB accesses in the /390 process mode”.
READ
The contents of the specified registers and, if required, the program counter and the complete x86 context (if LAYOUT=FCONTEXT on x86 servers), are read from the PCB of the specified process, to the specified fields.
WRITE
The specified registers and, if required, the program counter and the complete x86 context (if LAYOUT=FCONTEXT on x86 servers) of the specified process are overwritten by the values specified by the calling process.
Write access is only possible when the storage key in the PCB of the calling process matches the storage key in the PCB of the specified process.
/309 mode: The contents of the fields described with ILC/CC/PM/ASCMOD aretransferred to the PCB of the specified process (interrupted process or basic process). The information is to be stored in the corresponding bits.
LAYOUT=
Specifies the scope and structure of the data exchange field whose address is specified in the SAVE operand. This also controls the “write NIA” function via the STACKR=(PC) operand, see "CONTXT - Access process data".
COMPATIBLE
Preset value: the scope and layout of the /390 context is expected. The floating-point registers will only be passed if FPR=YES is also specified.
FCONTXT
The scope and layout of the x86 context is expected. For x86 contexts the floating-point registers are transferred via the data exchange field, regardless of the FPR operand. The length of the SAVE area to be provided by the user can be determined dynamically using the STXIT macro, CONTXTL operand.
The actual length required depends on the process mode. For information on the length and the layout of the relevant data exchange field see “Layout of the DSECT” on "CONTXT - Access process data".
LAYOUTF=DSECT
Triggers the creation of a DSECT for the data exchange field as in the operand LAYOUT=FCONTXT . The address of the data exchange field is specified in the SAVE operand when the action is called.
When this operand is specified, the only other operand evaluated is the PREFIX operand.
PREFIX=p
Specifies a letter which determines the first character of the field name and of the equate. This operand is only taken into account if LAYOUTF= DSECT is also specified.
ILC, CC, PM=
These operands are meaningless to a x86 PCB. They cannot be stored in a x86 PCB.
ILC=
Describes the address of a field for the instruction length code (in PCR format).Field length = 1 byte. Entry in bits 0-1.
addr
Symbolic address (name) of the field for the instruction length code.
(r)
Register containing the address value “addr”.
CC=
Describes the address of a field for the condition code (in PCR format).
Field length = 1 byte. Entry in bits 2-3.
addr
Symbolic address (name) of the field for the condition code.
(r)
Register containing the address value “addr”.
PM=
Describes the address of a field for the program mask (in PCR format).
Field length = 1 byte. Entry in bits 4-7.
addr
Symbolic address (name) of the field for the program mask.
(r)
Register containing the address value “addr”.
PMODE=
Describes the address of a field containing the processor mode.
Field length = 1 byte.
The processor mode can be read or written on x86 servers. It can only be read on other BS2000 servers.
The following processor modes mean:
X'00': /390 mode (native on /390 servers or under /390 firmware on x86 servers)X'01': x86 mode native
addr
Symbolic address (name) of the field containing the processor mode
(r)
r = register with the address value of addr.
MODE=
Defines the address of a 1-byte field which indicates the current addressing mode.
This is used for inquiring about or modifying the addressing mode used by the specified process.
The entry in this field has the following meaning:
X'00': 24-bit addressing mode
X'01': 31-bit addressing mode
If FUNCT=READ, the addressing mode is fetched from the PCB and entered in the specified field.
If FUNCT=WRITE, the specified addressing mode is entered in the PCB. When modifying the addressing mode, the user has to make sure that the context is compatible with the new addressing mode (24-bit or 31-bit).
addr
Symbolic address (name) of the field for the addressing mode.
(r)
Register containing the address value “addr”.
ASCMOD=
Describes the address of a 1-byte field which indicates the ASC (address space control) mode. The addressing mode of the specified process can be read or modified.
The entry in this field has the following meaning:
X'00': program space mode
X'40': access register mode (ASC mode); the program is running in AR mode (see also section “Extended addressing with data spaces”).
addr
Symbolic address (name) of the field for the ASC mode.
(r)
Register containing the address value “addr”.
PRGCODE=
Defines the address of a field for the program code. The interrupted command or the command set by NIA (Next Instruction Address) (from the specified process: LAST- or MAIN-PCB) is shown left-justified in this field. Read access only. Field length = 6 bytes. May only be specified in conjunction with the operand PRGCODL.
addr
Symbolic address (name) of the field for the program code.
(r)
Register containing the address value “addr”.
PRGCODL=
Defines the address of a field for the program code. The length of this command is written to this field. Field length = 1 byte.
May only be specified in conjunction with the operand PRGCODE. The following values are possible:
> 0: (=2 or =4 or =6): Length of the determined program code.
= 0: Indicator: The program code could not be determined. The field PRGCODE remains unchanged.
addr
Symbolic address (name) of the field for the length of the program code.
(r)
Register containing the address value “addr”.
PARMOD=
Controls macro expansion. Either the 24-bit or the 31-bit interface is generated.
If PARMOD is not specified here, macro expansion is performed according to the specification for the GPARMOD macro or according to the default setting for the assembler (= 24-bit interface).
24
The 24-bit interface is generated. Data lists and instructions use 24-bit addresses (address space<= 16 Mb).
31
The 31-bit interface is generated. Data lists and instructions use 31-bit addresses (address space <= 2 Gb).
MF=
For a general description of the MF operand, its operand values and any subsequent operands (e.g. for a prefix), see "S-type macros". The valid MF values are given at the start of the macro description under “Macro type” and are included in the macro format.
Layout of the DSECT for LAYOUT=FCONTXT
CONTXT LAYOUTF=DSECT 1 * 1 ********************************************************************** 1 * DSECT FOR SAVE-FIELD BY LAYOUT = FCONTXT * 1 ********************************************************************** 1 * 1 SFCONTXT DSECT 1 * 1 SAVEHSI DS X HSI INDICATOR 1 SHSI390 EQU X'01' /390 HSI 1 SHSI390E EQU X'03' /390 HSI + ESA 1 SHSIRISC EQU X'04' RISC HSI (NOT USED) 1 SHSISPAC EQU X'08' SPARC HSI 1 SHSISPME EQU X'0A' SPARC HSI + ESA 1 SHSISXI EQU X'10' IA64 HSI 1 SHSISXE EQU X'12' IA64 HSI+ ESA 1 SHSIX86 EQU X'20' X86 HSI 1 SHSIX86E EQU X'22' X86 HSI+ ESA 1 * 1 SAVEAMOD DS X ADDRESS MODE 1 SAMODE24 EQU X'00' 24-BIT ADDRESS MODE 1 SAMODE31 EQU X'01' 31-BIT ADDRESS MODE 1 * 1 SAVEPMOD DS X PROCESSOR MODE 1 SPMODE1 EQU X'00' "/390" (/390 - MACHINE) OR 1 * "/390-EMULATION" (SPARC-MACHINE) 1 SPMODE2 EQU X'01' "SPARC " (SPARC-MACHINE) 1 * 1 SAVEILC DS X INSTRUCT LENGTH CODE (PCR-FORMAT:BIT 0-1) 1 SAVECC DS X CONDITION CODE (PCR-FORMAT: BIT 2-3) 1 SAVEPM DS X PROGRAM MASK (PCR-FORMAT: BIT 4-7) 1 * 1 SAVEASCM DS X ASC-MODE (ESA) >> NOT USED ON RISC 1 * 1 DS XL1 UNUSED 1 * 1 *---------------------------------------------------------------- 1 * PROCESS MODE DEPENDENT AREA 1 *---------------------------------------------------------------- 1 * 1 SAV390A DS 0D AREA FOR PMODE = /390 AND SPARC 1 * 1 * ( RISC ) & /390 GENERAL REGISTERS 1 * 1 SAVERR0 DS 2F R0 ) (HARD-WIRED TO ZERO ! ) 1 SAVERR1 DS 2F R1 )
1 SAVERR2 DS 2F R2 ) 1 SAVERR3 DS 2F R3 ) 1 SAVERR4 DS 2F R4 >> RISC ONLY 1 SAVERR5 DS 2F R5 ) 1 SAVERR6 DS 2F R6 ) 1 SAVERR7 DS 2F R7 ) 1 * 1 SAVERR8 DS 2F R8 1 SAVEGR0 EQU SAVERR8+4 /390: R0 EQUIVALENT 1 SAVERR9 DS 2F R9 1 SAVEGR1 EQU SAVERR9+4 /390: R1 EQUIVALENT 1 SAVERR10 DS 2F R10 1 SAVEGR2 EQU SAVERR10+4 /390: R2 EQUIVALENT 1 SAVERR11 DS 2F R11 1 SAVEGR3 EQU SAVERR11+4 /390: R3 EQUIVALENT 1 SAVERR12 DS 2F R12 1 SAVEGR4 EQU SAVERR12+4 /390: R4 EQUIVALENT 1 SAVERR13 DS 2F R13 1 SAVEGR5 EQU SAVERR13+4 /390: R5 EQUIVALENT 1 SAVERR14 DS 2F R14 1 SAVEGR6 EQU SAVERR14+4 /390: R6 EQUIVALENT 1 SAVERR15 DS 2F R15 1 SAVEGR7 EQU SAVERR15+4 /390: R7 EQUIVALENT 1 SAVERR16 DS 2F R16 1 SAVEGR8 EQU SAVERR16+4 /390: R8 EQUIVALENT 1 SAVERR17 DS 2F R17 1 SAVEGR9 EQU SAVERR17+4 /390: R9 EQUIVALENT 1 SAVERR18 DS 2F R18 1 SAVEGR10 EQU SAVERR18+4 /390: R10 EQUIVALENT 1 SAVERR19 DS 2F R19 1 SAVEGR11 EQU SAVERR19+4 /390: R11 EQUIVALENT 1 SAVERR20 DS 2F R20 1 SAVEGR12 EQU SAVERR20+4 /390: R12 EQUIVALENT 1 SAVERR21 DS 2F R21 1 SAVEGR13 EQU SAVERR21+4 /390: R13 EQUIVALENT 1 SAVERR22 DS 2F R22 1 SAVEGR14 EQU SAVERR22+4 /390: R14 EQUIVALENT 1 SAVERR23 DS 2F R23 1 SAVEGR15 EQU SAVERR23+4 /390: R15 EQUIVALENT 1 * 1 SAVERR24 DS 2F R24 ) 1 SAVERR25 DS 2F R25 ) 1 SAVERR26 DS 2F R26 ) 1 SAVERR27 DS 2F R27 >> RISC ONLY 1 SAVERR28 DS 2F R28 ) 1 SAVERR29 DS 2F R29 ) 1 SAVERR30 DS 2F R30 ) (ADDRESS MODE MASK) 1 SAVERR31 DS 2F R31 )
1 * 1 * 1 SAVENIA DS 2F NIA/PC (NEXT INSTRUCTION ADDRESS) 1 SVNIA390 EQU SAVENIA+4 /390: NIA-EQUIVALENT 1 * 1 * 1 SAVEHI DS 2F MULTIPLE/DIVIDE REG HI RESULT (RISC ONLY) 1 SAVELO DS 2F MULTIPLE/DIVIDE REG LO RESULT (RISC ONLY) 1 * 1 * 1 * ( RISC ) & /390 FLOATING POINT REGISTERS 1 * 1 SAVEF0 DS F F0 : F0/1 = /390: EXT FPR 8 EQUIVALENT 1 SAVEF1 DS F F1 1 SAVEF2 DS F F2 : F2/3 = /390: EXT FPR 10 EQUIVALENT 1 SAVEF3 DS F F3 1 SAVEF4 DS F F4 : F4/5 = /390: EXT FPR 12 EQUIVALENT 1 SAVEF5 DS F F5 1 SAVEF6 DS F F6 : F6/7 = /390: EXT FPR 14 EQUIVALENT 1 SAVEF7 DS F F7 1 SAVEF8 DS F F8 : F8/9 = /390: EXT FPR 1 EQUIVALENT 1 SAVEF9 DS F F9 1 SAVEF10 DS F F10: F10/11 = /390: EXT FPR 3 EQUIVALENT 1 SAVEF11 DS F F11 1 SAVEF12 DS F F12: F12/13 = /390: EXT FPR 5 EQUIVALENT 1 SAVEF13 DS F F13 1 SAVEF14 DS F F14: F14/15 = /390: EXT FPR 7 EQUIVALENT 1 SAVEF15 DS F F15 1 SAVEF16 DS F F16: F16/17 = /390: EXT FPR 9 EQUIVALENT 1 SAVEF17 DS F F17 1 SAVEF18 DS F F18: F18/19 = /390: EXT FPR 11 EQUIVALENT 1 SAVEF19 DS F F19 1 * 1 SAVEF20 DS 2F F20/21 = /390: FPR 0 EQUIVALENT 1 SAVEF22 DS 2F F22/23 = /390: FPR 2 EQUIVALENT 1 SAVEF24 DS 2F F24/25 = /390: FPR 4 EQUIVALENT 1 SAVEF26 DS 2F F26/27 = /390: FPR 6 EQUIVALENT 1 * 1 SAVEF28 DS F F28: F28/29 = /390: EXT FPR 13 EQUIVALENT 1 SAVEF29 DS F F29 1 SAVEF30 DS F F30: F30/31 = /390: EXT FPR 15 EQUIVALENT 1 SAVEF31 DS F F31 1 * 1 SAVEFCR DS F FP-CONTROL-/STATUS REG >> NOT USED ON RISC 1 * 1 * 1 * /390-ESA ACCESS REGISTERS 1 *
1 SAVEAR0 DS F ACR0 ) 1 SAVEAR1 DS F ACR1 ) 1 SAVEAR2 DS F ACR2 ) 1 SAVEAR3 DS F ACR3 >> NOT USED ON RISC 1 DS 9F ACR4-ACR12 ) 1 SAVEAR13 DS F ACR13 ) 1 SAVEAR14 DS F ACR14 ) 1 SAVEAR15 DS F ACR15 ) 1 * 1 SWOSPARC EQU *-SFCONTXT LENGTH - WITHOUT SPARC-BLOCK 1 * 1 *---------------------------------------------------------------- 1 * SPARC CONTEXT BLOCK 1 *---------------------------------------------------------------- 1 * 1 DS 0D ) 1 SSPARCB DS 100D SPARC-AREA: BEGIN ) 1 DS 100D >> FOR SPARC ONLY 1 DS 15D ) 1 SSPARCE DS 0D SPARC-AREA: END ) 1 SLSPARCB EQU SSPARCE-SSPARCB LENGTH OF SPARC-BLOCK (SPARC) 1 * 1 *---------------------------------------------------------------- 1 * 1 SAVLNGTH EQU *-SFCONTXT LENGTH OF SAVE-FIELD (SPARC) 1 * 1 *---------------------------------------------------------------1 * IA64 CONTEXT BLOCK: FCONTEXT 1 *---------------------------------------------------------------1 * 1 ORG SSPARCB REDEFINITION OF NATIVE AREA 1 SSXIB DS 0D IA64-AREA: BEGIN 1 SLIA64 EQU SWOSPARC+4064 LENGTH OF IA64 CONTEXT 1 * 1 * 1 * 1 *---------------------------------------------------------------1 * X86 CONTEXT BLOCK: FCONTEXT 1 *---------------------------------------------------------------- 1 * 1 ORG SSPARCB REDEFINITION OF NATIVE AREA 1 SX86E DS 0D X86-AREA: BEGIN 1 SLX86E EQU SWOSPARC+4096 LENGTH OF X86 CONTEXT 1 * 1 *----------------------------------------------------------------
Return information and error flags
During execution of the macro, register R1 contains the address of the operand list.
R15:
+---------------+ | | | | | |b|b| | | | |a|a| +---------------+
A structured return code (aa=primary return code, bb=secondary return code) relating to the execution of the CONTXT macro is transferred in register R15.
aa=X'00': normal execution
aa!=X'00': function was not executed.
X'bb' | X'aa' | Meaning |
X'00' | X'00' | Normal execution. The PCB had not yet been changed (in the current interrupt state) |
X'04' | X'00' | Normal execution. The PCB had already been changed with CONTXT (in the current |
X'04' | X'04' | Function was not executed; invalid operands |
X'04' | X'08' | Function was not executed. The macro was given in a basic process |
X'04' | X'18' | Write not permitted
|
X'04' | X'1C' | Function was not executed. When FUNCT=WRITE the storage key in the PCB to be |
X'04' | X'20' | Function was not executed: |
PCB accesses in the /390 process mode
The following table shows the result of accessing the PCB, depending on the CONTXT operands, run mode of the interrupted process and the LAYOUT operand specification:
CONTXT | CONTXT | LAYOUT=COMPATIBLE | LAYOUT=FCONTXT | ||
/390-PCB | x86 PCB | /390 PCB | x86 PCB | ||
SAVE | READ | (1) | (2) | (3) | (4) |
WRITE | (1) | RC=X'18' (*) | (3) | (4) | |
OWNR/STACKR | READ | as before | R0-R15 | as before | R0-R15 |
WRITE | as before | R0-R15 | as before | R0-R15 | |
STACKR=(PC) | READ | as before | x86 native NIA | as before | x86 nativeNIA |
WRITE | as before | RC=X'18' (*) | as before | x86 nativeNIA | |
SAVACR/ | READ | as before | as before | as before | as before |
STKACR / | WRITE | as before | as before | as before | as before |
FPR | READ | (5) | (5) | (6) | (7) |
WRITE | (5) | (5) | (6) | (7) | |
ILC | READ | as before | value: 0 or 4 | as before | value: 0 or 4 |
WRITE | as before | RC=X'18' | as before | RC=X'18' | |
CC | READ | as before | value: X'00' | as before | value: X'00' |
WRITE | as before | RC=X'18' | as before | RC=X'18' | |
PM | READ | as before | value: X'00' | as before | value: X'00' |
WRITE | as before | RC=X'18' | as before | RC=X'18' | |
MODE | READ | as before | as before | as before | as before |
WRITE | as before | as before | as before | as before | |
PMODE | READ | X'00' | X'01' | X'00' | X'01' |
WRITE | (8) | (8) | (8) | (8) | |
Meaning of the abbreviations used in the table:
R0 - R15: | general registers |
RC: | Return code |
Meaning of the comments in the table:
(*): | The program counter (PC / NIA = Next Instruction Address) may only be written if it |
(1): | The data exchange field has the same structure as before. |
(2): | The data exchange field has the same structure as before. |
(3): | The data exchange field utilizes the new structure. Only the registers equivalent to |
(4): | In addition to (3), the complete x86 context is read and written (via the exchange |
(5): | The data is transferred between the /390 floating-point registers of the specified |
(6): | Only via the SAVE operands, see (3) |
(7): | Only via the SAVE operands, see (4) |
(8): | Writing the PMODE is allowed in order, for example, to restart the interrupted PCB |