make - maintain, update and regenerate groups of programs

In modular programming, programs are typically made up of a number of files. make is a tool for updating programs of this type.

make uses a makefile, in which you can define targets and dependencies between targets. If one source file has been modified, make regenerates the program by recompiling only those parts which are directly or indirectly dependent on the modified file.

make regenerates the target if it is older than at least one of the files on which it is dependent. make allows for the dependency relationships between the file and checks the date and time when a file was last modified.

The makefile is normally called makefile, Makefile, s.makefile or s.Makefile. If you follow this naming convention, you can call make without specifying any arguments. make will look for the makefile in the current working directory or in the SCCS directory and will regenerate the target if at least one modification has been made.

Syntax

make[ -einpqrst][ -f makefile]... [ -k|-S] [macro=name]... [target]...

make options:

-e

Cause environment variables to override macro assignments within makefiles.

-f makefile

Specify a different makefile. makefile is a pathname of a description file, which is also referred to as the makefile.

-i

Ignore error codes returned by invoked commands. This mode is the same as if the special target .IGNORE were specified without prerequisites.

-k

Continue to update other targets that do not depend on the current target if a non-ignored error occurs while executing the commands to bring a target up-to-date.

-k overrides earlier -S options.

-n

Useful for debugging. Write commands that would be executed to standard output, but do not execute them. Even lines with an at sign (@) character prefix will be written to standard output. Lines with a plus sign (+) prefix will be executed. 

-p

Write to standard output the complete set of macro definitions and target description.

The output format is unspecified.

-q

Return a zero exit value if the target file is up-to-date; otherwise an exit value of 1. Targets will not be updated if this option is specified. However, a command line (associated with the targets) with a plus sign (+) prefix will be executed.

-r

Clear the suffix list and do not use the built-in rules.

-s

Do not write command lines or touch messages to standard output before execution. This mode is the same as if the specified target SILENT were specified without prerequisites.

-S

Terminate make if an error occurs while executing the commands to bring a target up-to-date. This will be the default and the opposite of -k.

-t

Update the modification time of each target as though a touch target had been executed. A command with a plus sign (+) prefix will be executed.

Creating a makefile

The makefile specified by the -f option is a carefully structured file containing explicit instructions for updating programs. The file contains a sequence of entries defining dependencies.

The first line of each entry is a blank-separated, non-empty list of targets, followed by :, then by a list (which may be empty) of required files or dependencies. Text following a ; and all following lines that begin with a tab are shell commands that are to be executed in order to update the target.

The first non-blank line which does not begin with a tab or # starts a new dependency or macro definition. Shell commands may be continued across several lines with a <backslash><newline> sequence. Everything that make outputs (apart from the initial tab) is passed directly to the shell unmodified. Thus

echo a\

b

will cause ab to be output just as the shell would.

Commands extending across several lines may be no more than LINE_MAX lines long if the .POSIX directive is used.

Comments start with a number sign (#) and continue until an unescaped newline character is reached.

The following makefile says that pgm depends on two files, a.o and b.o, and that they in turn depend on their corresponding source files (a.c and b.c), and a common file incl.h:

pgm: a.o b.o
      c89 a.o b.o -o pgm
a.o: incl.h a.c
       c89 -c a.c
b.o: incl.h b.c
       c89  -c b.c

Executing a makefile

Command lines are executed one at a time, each by its own shell. The SHELL environment variable or the SHELL macro can be used to specify the shell that make should use to execute commands. The default is /usr/bin/sh.

The following directives (special targets) can be included in a makefile to control the behavior of make:

.POSIX

This special target must be specified without prerequisites or commands. If it appears before the first non-comment line in the makefile, make will process the makefile specified by this section; otherwise the behavior of make is unspecified.

.DEFAULT

If the makefile uses this special target, it must be specified with commands, but without prerequisites. The commands will be used by make if there are no other rules available to build a target.

.IGNORE

Prerequisites of this special target are targets themselves; this will cause errors from commands associated with them to be ignored in the same manner as specified by the -i option.

.PRECIOUS

Prerequisites of this special target will not be removed if make receives the quit or interrupt signal. If no prerequisites are specified, all targets will be ignored.

.SILENT

Prerequisites of this special target are targets themselves; this causes commands associated with them to not be written to the standard output before they are executed.

Command lines can have one or more of the following prefixes: an at sign @, a hyphen (-), or a plus sign (+). These modify the way in which make processes the command. When a command is written to standard output, the prefix is not included in the output.

@

the command will not be written to standard output before it is executed.

-

any error found while executing the command will be ignored

+

a command line will be executed even if the -n, -q or -t option is specified.

A line is output when it is executed unless the -s option is present or the .SILENT directive applies to the file or the initial character sequence includes a @. The -n option causes the command to be output without being executed unless a there is a + prefixed to the command line (in which the command will always be executed). The -t option updates the modified date of a file without executing any commands except where there is a + prefixed to a command).

Normally (or when the -S option is set), commands which return a non-zero status cause make to terminate. The exit status is ignored if the -i option is present or if the .IGNORE directive applies to the file or if the initial character sequence of the command includes -. If the -k option is present, work is abandoned on the current entry, but continues on other branches which are not dependent on that entry.

Interrupt and quit signals cause the target file to be deleted unless the .PRECIOUS directive applies to it.

Environment

The environment is read by make. All variables are assumed to be macro definitions and processed as such. The environment variables are processed before any makefile and immediately after the predefined rules. Thus macro assignments in makefile override environment variables. The -e option causes the environment to override macro assignment in a makefile. File name suffixes and their associated rules in a makefile override predefined rules for any identical suffixes.

The MAKEFLAGS environment variable may contain macros and any input options other than -f and -p which are valid for the command line. make interprets the variable before the command line. When make is invoked, the identically named macro MAKEFLAGS (and the variable, if undefined) is automatically supplied with the current options and macros and passed on to invocations of commands. Consequently the MAKEFLAGS always contains the latest definitions. This proves very useful for “super-makes”. In fact, when the -n option is used, $(MAKE) is always executed anyway. That means that you can run make -n recursively on a whole software system to see what would have been executed. This is possible because the -n is added to MAKEFLAGS and passed to further invocations of
$(MAKE). This is one way of debugging all the makefiles for a software project without actually running anything.

The environment variable PROJECTDIR provides a directory to be used to search for SCCS files not found in the current directory. If the value of PROJECTDIR begins with a slash, it is considered an absolute pathname; otherwise, the home directory of a user of that name is examined for a subdirectory src or source. If such a directory is found, it is used. Otherwise, the value is used as relative pathname.

Include files

If include followed by a blank or a tab appears at the start of a line in a makefile, the rest of the line is interpreted as a file name, and the associated file will be read by the current invocation after substitution of any macros.

Macro definitions

Macro definitions are in the form string1 = string2. string2 is defined as all characters, if any, after the equal sign, up to a comment character (#) or an unescaped newline character. Subsequent appearances of $(string1[:subst1=[subst2]]) are replaced by string2. The parentheses are optional if a one-character macro name is used and there is no substitution rule. The optional :subst1=subst2 is a substitution rule. If a rule is specified, all non-overlapping occurrences of subst1 in the specified macro are replaced by subst2. Strings for this type of substitution are delimited by blanks, tabs, newline characters and beginnings of lines. An example of the use of a substitution rule is shown in the Libraries section.

Internal macros

The make utility maintains five internal macros that can be used in target and inference rules.

$*

evaluates to the current target name with its suffix deleted. It is evaluated at least for inference rules.

$@

evaluates to the full target name of the current target, or the archive filename part of a library archive target. It is evaluated for both target and inference rules.

$<

in an inference rule, $< evaluates to the file name whose existence allowed the inference rule to be chosen for the target. In the .DEFAULT rule, the $< macro evaluates the current target name. The $< macro is evaluated only for inference rules. For example, in the .c.a. inference rule, $< represents the prerequisite .c file.

An example for making optimized .o-files from .c-files is:

.c.o:

c89 -c -O $*.c

or:

.c.o:

c89 -c -O $<

$?

evaluates to the list of prerequisites that are newer than the current target. It is evaluated for both target and inference rules.

$%

evaluates only when the current target is an archive library member of the form libname(member.o) . In theses cases, $@ evaluates to libname and $% evaluates to member.o.

Each of the internal macros has an alternative form. When an upper-case D or F is appended to any of the macros, the meaning is changed to the directory part for D and filename part for F. The directory part is the path prefix of the file without a trailing slash; for the current directory, the directory part is ".". When the $? macro contains more than one prerequisite filename, the $(?D) and $(?F) (or ${?D} and ${?F}) macros expand to a list of directory name parts and filename parts respectively.

Default rules

Certain file names, such as those ending in .o, have inferable prerequisites (dependency relationships) such as .c or .s. If no update commands for such a file are defined in the makefile, make looks for and compiles files matching the default prerequisites in order to make the target. For this purpose make has inference rules that allow it to build files from other files by examining suffixes and determining an appropriate inference rule to use.

The following are the default inference rules:

.c	.c~	.f	.f~	.s	.s~	.sh	.sh~	.C	.C~
.c.a	.c.o	.c~.a	.c~.c	.c~.o	.f.a	.f.o	.f~.a	.f~.f	.f~.o
-h~.h	.l.c	.l.o	.l~.c	.l~.l	.l~.o	.s.a	.s.o	.s~.a	.s~.o
.s~.s	.sh~.sh	.y.c	.y.o	.y~.c	.y~.o	.y~.y	.C.a	.C.o	.C~.a
.C~.C	.C~.o	.L.C	.L.o	.L~.C	.L~.L	.L~.o	.Y.C	.Y.o	.Y~.C
.Y~.o	.Y~.Y

The user can add rules to this list by entering them in the makefile.

The inference of prerequisites can be controlled. The rule for creating a file with the suffix .o from a file with the suffix .c is specified as an entry with c.o.: as the target and no dependents. Shell commands associated with the target define the rule for creating a .o file from a .c file. A target with no slashes in it and beginning with a dot is identified as a rule and not as a true target.

The default rules for make appear in the rules.c source file for the make program. They can be modified locally. The following command is used to output the rules compiled into the make on any machine in a form suitable for recompiling:

make -pf - 2>/dev/null </dev/null

A tilde in the above rules refers to an SCCS file. Thus the rule .c ̃.o would convert an SCCS C source file to an object file (.o). Since the s. of the SCCS files is a file name prefix, it is incompatible with the make suffix concept. Thus the tilde is a way of changing a file reference to an SCCS file reference.

A rule with only one suffix (e.g. .c:) defines how to build x from x.c. In effect, the other suffix is null. This is useful when buildings targets from only one source file (for instance, shell scripts or simple C programs).

Additional suffixes can be defined as a list with .SUFFIXES. The order of the list is significant: the first possible name for which a file and a rule are present is selected. The default list is:

.SUFFIXES .o .c .c~ .y .y~ .l .l~ .s .s~ .sh .sh~ .h .h~ .f .f~ .C .C~ .Y .Y~ .L .L~

The above command for outputting the internal rules also displays this list of suffixes implemented on the current machine. Multiple suffix lists are cumulative; .SUFFIXES: with no dependencies clears the list of suffixes.

Thus the example shown under “Creating a makefile” can be formulated more concisely:

pgm: a.o b.o
      cc a.o b.o -o pgm
a.o b.o: incl.h

The default inference rules use certain macros to permit the inclusion of optional elements in the resultant command sequence. For example, CFLAGS, LFLAGS and YFLAGS are used for compiler options for cc [5], lex and yacc respectively.

The .SCCS_GET directive allows you to modify the default commands for accessing SCCS files which are not in the current working directory. The default rule is:

.SCCS_GET: sccs $(SCCSFLAGS) get $(SCCSGETFLAGS) $@

Libraries

If a target or prerequisite contains parentheses, it will be treated as a member of an archive library, where the string in parentheses refers to a member in the library.

Thus lib(file.o) and $(LIB)(file.o) refer to an archive library that contains file.o. This assumes that the LIB macro has been defined previously. The expression
$(LIB)(file1.o file2.o) is not valid. Rules associated with archive libraries take the form .XX.a, where XX is the suffix of the file from which the archive member is to be made. Unfortunately, the current implementation requires XX to be different from the suffix of the archive member. Thus it is not possible to specify that lib(file.o) is dependent on file.o.

The most common use of the archive interface follows. Here, it is assumed that the source files are all C-language source:

lib:  lib(file1.o) lib(file2.o) lib(file3.o)
       @echo lib is now up-to-date
.c.a:
      $(CC) -c $(CFLAGS) $<
      $(AR) $(ARFLAGS) $@ $*.o
      rm -f $*.o

In fact, this .c.a rule is predefined in make and is superfluous in this example. A more interesting but more limited example of archive library maintenance is:

lib:  lib(file1.o) lib(file2.o) lib(file3.o)
      $(CC) -c $(CFLAGS) $(?:.o=.c)
      $(AR) $(ARFLAGS) lib $?
      rm $?
      @echo lib is now up-to-date .c.a:;

In this case the macro substitution mechanism is used. The $? list is defined as the set of object file names (within lib) whose C source files are outdated. The macro substitution mechanism replaces .o with .c. Unfortunately it is not yet possible to translate to .c ̃, but this transformation may be implemented in the future. Also note the disabling of the .c.a: rule, which would have created each object file one after the other. This special construct considerably accelerates archive library maintenance, but it does become rather cumbersome if the archive library contains a mix of assembly programs and C programs.

File

[Mm]akefile and s.[Mm]akefile

/usr/bin/sh

Hint

Some commands return an inappropriate non-zero status. You can overcome this problem by using -i or the command line prefix -.

File names containing the characters = : @ cannot be processed.

Commands which are directly executed by the shell, particularly cd, are ineffectual across new-lines in make.

The syntax lib(file1.o file2.o file3.o) is invalid. It is not possible to build lib(file.o) from file.o.

Locale

The following environment variables affect the execution of make:

LANG

Provide a default value for the internationalization variables that are unset or null. If LANG is unset of null, the corresponding value from the implementation-specific default locale will be used. If any of the internationalization variables contains an invalid setting, the utility will behave as if none of the variables had been defined.

LC_ALL

If set to a non-empty string value, override the values of all the other internationalization variables.

LC_CTYPE

Determine the locale for the interpretation of sequences of bytes of text data as characters (for example, single- as opposed to multi-byte characters in arguments and input files), the classification of characters as upper- to lower-case, and the mapping of characters from one case to the other.

LC_MESSAGES

Determine the locale that should be used to affect the format and contents of diagnostic messages written to standard error.

NLSPATH

Determine the location of message catalogs for the processing of LC_MESSAGES.

See also

ar, lex, yacc

c89 [5]